ASIC Engineer Intern, Implementation

This internship is based in Sunnyvale, CA and lasts between twelve (12) to sixteen (16) weeks.

Compensation:

$6,660/month to $11,647/month + benefits

Responsibilities:

• Participate in design implementation, physical design, and design power reviews.
• Contribute to optimizing RTL for IPs to achieve best PPA (Power, Performance, Area).
• Develop scripts, tools, and methods to enhance PPA.
• Support and develop EDA infrastructure to improve designer productivity.
• Assist in simulation accelerators and post-silicon validation.

Minimum Qualifications:

• Currently pursuing a Bachelor's degree in Electrical Engineering, Computer Engineering, or related fields.
• Knowledge of Verilog, VHDL, or HLS.
• Understanding of computer architecture and logic design fundamentals.
• Must obtain work authorization in the country of employment at the time of hire.
• Intent to return to degree program after the internship.

Preferred Qualifications:

• Pursuing a Master's or PhD degree in relevant fields.
• Experience with Lint, Synthesis, Formal or Physical Design tools.
• Scripting capability with Python or Perl.
• Experience with High Performance Computing and Digital Signal Processing Techniques.
• Strong creativity and problem-solving skills.